Litcius/Paper detail

A 20F<sup>2</sup>/Bit Current-Integration-Based Differential nand-Structured PUF for Stable and <i>V</i>/<i>T</i> Variation-Tolerant Low-Cost IoT Security

Jongmin Lee, Min-Sun Kim, Minhyeok Jeong, Gicheol Shin, Yoonmyung Lee

2022IEEE Journal of Solid-State Circuits20 citationsDOI

Abstract

A current-integration-based differential NAND-structured physically unclonable function (PUF) with 20F <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> area per bit is proposed for low-cost IoT security. Current integration scheme with a capacitor is adopted to generate a response bit by comparing the delay of capacitor charging through pair of selected MOSFET transistors. For area-efficient implementation, minimum-sized MOSFETs are selected from NAND-flash-like array structure. By operating selected MOSFET pairs in moderate inversion mode, higher sensitivity to threshold voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\mathrm {th}}$ </tex-math></inline-formula> ) variation, and hence more stable response generation, is achieved while keeping it faster than weak inversion operation. A stabilization scheme based on current integration is proposed by discarding or remapping the transistor pairs that generate small charging delay difference. The proposed current-integration-based differential NAND-structured PUF (CI NAND-PUF) achieved high <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V/T$ </tex-math></inline-formula> variation tolerance of 0.145%/0.1 V and 0.120%/10 °C while limiting 20F <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /bit area for 1-bit random response generation. With the proposed stabilization scheme, up to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$11\times $ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$7.7\times $ </tex-math></inline-formula> BER improvement is achieved for trimming and remapping, respectively.

Topics & Concepts

NAND gateAlgorithmTransistorComputer scienceTopology (electrical circuits)MathematicsElectrical engineeringVoltageLogic gateCombinatoricsEngineeringPhysical Unclonable Functions (PUFs) and Hardware SecurityAdvanced Memory and Neural ComputingIntegrated Circuits and Semiconductor Failure Analysis