A Real-Time Edge-Detection CMOS Image Sensor for Machine Vision Applications
Minjun Park, Hyeon‐June Kim
Abstract
This article presents a real-time edge image extraction CMOS image sensor (CIS) with an edge-detection counter for machine vision applications. By examining a conventional column-parallel (CP) CIS imaging structure with a single-slope analog-to-digital convertor (SS ADC), it discovered an additional time slot available to extract information of an additional image during a normal imaging operation of two adjacent columns. While obtaining a normal image in this study, the prototype CIS with the proposed edge-detection counter effectively utilizes the spare time for extracting an additional column edge image without an image signal processor (ISP) and any computational latency. In addition, by applying a proposed variable edge thresholding function, the proposed CIS can adopt an optimum edge threshold value according to its imaging condition, alleviating an inherent limitation of a column edge image. This prototype CIS was fabricated using a 0.18- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> 1-poly 6-metal (1P6M) CMOS process with an effective pixel resolution of 320 (H) <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times320$ </tex-math></inline-formula> (V). The prototype consumes 17.72-mW power with a frame rate of 240 frames/s. The prototype CIS demonstrated a figure of merit of 721 pW/frame pixel.