SPAD Developed in 55 nm Bipolar-CMOS-DMOS Technology Achieving Near 90% Peak PDP
Won-Yong Ha, Eunsung Park, Doyoon Eom, Hyo-Sung Park, Francesco Gramuglia, Pouyan Keshavarzian, Ekin Kizilkan, Claudio Bruschini, Daniel Chong, Shyue Seng Tan, Michelle Tng, Elgin Quek, Edoardo Charbon, Woo‐Young Choi, Myung-Jae Lee
Abstract
We present a single-photon avalanche diode (SPAD) developed in 55 nm bipolar-CMOS-DMOS (BCD) technology, which achieves high photon detection probability (PDP) while its breakdown voltage is lower than 20 V. To enhance the PDP performance, the SPAD junction is optimized with lightly-doped-drain and high-voltage-well layers which are provided in the BCD process. In addition, the dielectric layers over the SPAD are properly etched to reduce multilayer reflections so that the photon collection efficiency can be maximized. The SPAD achieves a peak PDP of 89.4% at 450 nm wavelength with the excess bias voltage of 7 V, while its breakdown voltage is 16.1 V. At the same bias condition, the device shows a dark count rate (DCR) of 38.2 cps/μm2. It also achieves a timing jitter of 55 ps at 940 nm with the 7 V excess bias. This new high-performance SPAD implemented in such an advanced node BCD technology operating at a low breakdown voltage is expected to have a major impact on several single-photon applications, especially biomedical sensing and imaging.