Circulating Current Suppression for Paralleled Three-Level T-Type Inverters With Online Inductance Identification
Xi Liu, Tong Liu, Alian Chen, Xiangyang Xing, Chenghui Zhang
Abstract
Paralleled three-level T-type inverters (3LT <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> Is) have the merits of high-power rating, improved reliability, and convenient maintenance. However, there exists a circulating current that will lead to current distortion and increased system losses. Especially under unbalanced inductance, the circulating current is even more serious, and the conventional control methods are difficult to reduce the circulating current without additional communication. To overcome this drawback, a generalized model for analyzing circulating current in parallel 3LT <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> Is under unbalanced inductance is developed. Based on the generalized model, a novel deadbeat control scheme is proposed for the circulating current suppression with the advantages of easy to implement and no intermodule communication. Furthermore, an online inductance identification method based on the recursive least squares method for the 3LT <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> Is under unbalanced inductance is derived to obtain the parameters of the proposed deadbeat algorithm. Compared with the conventional methods, the method proposed by this article is simpler in design and no intermodule communication while the influence of unbalanced inductance is eliminated. The effectiveness of the proposed method is verified by the simulation and experimental results.