Single-Ended Receiver-Side Crosstalk Cancellation With Independent Gain and Timing Control for Minimum Residual FEXT
Yong-Un Jeong, Sungphil Choi, Suhwan Kim, Joo‐Hyung Chae
Abstract
In multi-lane interfaces using single-ended signaling such as memory interfaces, far-end crosstalk (FEXT) noise of the aggressor signal severely degrades signal integrity of the victim signal. A circuit for crosstalk cancellation (XTC) can reduce FEXT noise. However, the channel spacing makes the flight time difference between the forward and FEXT signals. As a result, the residual FEXT can remain. To further minimize the residual FEXT, this study proposes an XTC method to adjust the amplitude and timing independently. The timing is adjusted according to the passive element’s value of the differentiator, and the amplitude is varied by using the high-frequency boosting circuit. Moreover, a continuous-time linear equalizer (CTLE) and a 1-tap decision feedback equalizer (DFE) are applied to reduce inter-symbol interference. A prototype chip of 2-lane receiver was fabricated in a 55-nm CMOS process to verify this scheme. Using the proposed XTC, CTLE, and 1-tap DFE, timing margins of 0.21 UI and 0.36 UI were achieved in 6-mil and 15-mil channel spacings at 6.4 Gb/s, both at a bit error rate of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{-12}$ </tex-math></inline-formula> .