Dead Time Optimization for Synchronous Switching of SiC MOSFETs Considering Nonlinear Gate Capacitance
Yimin Zhou, Zhiqiang Wang, Guoqing Xin, Jun Yuan, Xiaojie Shi
Abstract
The synchronous-switching dead-time optimization is critical for high-frequency silicon carbide (SiC)-based converters operating in the synchronous rectification mode. In previous research, the constant input capacitance <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">iss</sub> from the datasheet was typically utilized for dead time optimization, which is obtained with a zero gate-source voltage ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gs</sub> = 0). In practice, however, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">iss</sub> is strongly dependent on <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gs</sub> and cannot be regarded as a constant during synchronous turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> transient. Thus, this letter proposes an analytical model integrating <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gs</sub> -dependent gate capacitance for optimal dead time design. Experimental results show that the proposed model can accurately predict the optimal dead time, with an average error less than 2 ns under all operating conditions for three types of SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s with different gate structures.