Low Switching Loss and EMI Noise IGBT With Self-Adaptive Hole-Extracting Path
Jie Wei, Sen Zhang, Xiaorong Luo, Diao Fan, Bo Zhang
Abstract
A superjunction insulated gate bipolar transistor (SJ-IGBT) featuring a self-adaptive hole-extracting (SAHE) path is proposed and investigated by simulation. The SAHE path is formed by a narrow p-type mesa between the two trench gates. In the ON-state, the p-type mesa is depleted by the trench gates and the hole path is pinched off so as to maintain high injection efficiency, and thus a low ON-state voltage ( V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ) is achieved. During the turn-off period, the p-type mesa recovers into neutral region adaptively and then the hole-extracting path is opened, which helps decrease the turn-off loss ( E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ) and suppress the dynamic avalanche. Moreover, at the initial turn-on stage with the SAHE path opening, the P-pillar in the proposed device is shorted to the emitter electrode rather than floating, which suppresses the negative capacitance effect. Therefore, compared with the SJ-IGBT with floating P-pillar, the SAHE SJ-IGBT not only achieves better V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> ON</sub> -E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> OFF</sub> tradeoff but also reduces the surge current by 23% at the turn-on stage and obtains better controllability on the turn-on dV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE</sub> / dt and dI <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</sub> /dt characteristics, greatly decreasing the electromagnetic interference (EMI).