Impact of interface trap charges on device level performances of a lateral/vertical gate stacked Ge/Si TFET-on-SELBOX-substrate
Ashish Kumar Singh, Manas Ranjan Tripathy, Kamalaksha Baral, Prince Kumar Singh, Satyabrata Jit
Topics & Concepts
HeterojunctionOptoelectronicsMaterials scienceLinearitySubstrate (aquarium)Subthreshold swingAcceptorTrap (plumbing)TransistorElectrical engineeringMOSFETPhysicsCondensed matter physicsVoltageEngineeringMeteorologyGeologyOceanographyAdvancements in Semiconductor Devices and Circuit DesignSemiconductor materials and devicesFerroelectric and Negative Capacitance Devices