Excellent Improvement of Contact Resistivity and Thermal Stability for High Temperature Process After Silicidation of TiSi<sub>2</sub> Through Ta Interlayer for Diffusion Barrier
Min-Su Kim, Seong‐Hyun Hwang, Seung‐Hwan Kim, Jong‐Hyun Kim, Euyjin Park, Kyu‐Hyun Han, Hyun‐Yong Yu
Abstract
Titanium Silicide (TiSi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> is a primary contact material with low-resistance contact characteristics used in nanodevices. However, the rapid scaling trend requires further improvement to achieve both high thermal stability and low contact resistivity. Herein, a method for simultaneously improving the contact resistivity and thermal stability of the TiSi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /Si interface is proposed by inserting a Ta interlayer into Ti/p-Si. The Ta-interlayered TiSi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> (Ta IL TiSi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) achieves an improved contact resistivity by approximately 7.9 times compared to that without the Ta interlayer. This remarkable improvement is due to the smooth contact morphology resulting from the suppressed excess diffusion of Ti and Si and dopant segregation at the TiSi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /Si interface. Particularly, because additional reaction during post annealing is minimized by the Ta interlayer, Ta IL TiSi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> shows a low sheet resistance of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3.71~\Omega /\Box $ </tex-math></inline-formula> even after post annealing at 600 °C & 30 min, which is much lower than the conventional TiSi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> scheme under the same annealing conditions. These results are expected to provide insights into state-of-the-art CMOS-based devices that require both low contact resistivity and better thermal margins.