Implementations and Analysis of Efficient Adders for 8, 16, and 32-Bit Design
Ankit, V Anuraj, Preeti Verma, Dhandapani Vaithiyanathan
Abstract
VLSI (Very Large Scale Integration) enables the integration of millions of transistors on a single chip, optimizing both performance and power consumption. Parameters in VLSI design allow for flexible customization of circuit characteristics, such as timing, power, and area. By adjusting parameters, designers can reuse modules across different applications while tailoring them to specific needs. Adders are digital components widely used in digital integrated circuit design. They play a crucial role in digital signal processing (DSP) and other digital applications. digital filters like FIR, and microprocessor applications. Researchers are working to create adders with fast speed, low power consumption, or small space as technology continues to advance. The architecture and functionality of the 8, 16, and 32-bit Kogge Stone Adder (KSA), Carry Look Ahead Adder (CLA), Carry Save Adder (CSA), and Carry Skip Adder (CSkA) are covered in this paper. In the Implementation of RCA, CSkA, CSA, CLA, and KSA, the Xilinx Vivado tool is used for the execution, simulation, logical verification, and synthesizing. Verilog hardware description language is used to design arithmetic adder units.