Honeycomb: Ordered Key-Value Store Acceleration on an FPGA-Based SmartNIC
Junyi Liu, Aleksandar Dragojević, Shane Fleming, Antonios Katsarakis, Dario Korolija, Igor Zablotchi, Ho-Cheung Ng, Anuj Kalia, Miguel Castro
Abstract
In-memory ordered key-value stores are an important building block in modern distributed applications. We present Honeycomb, a hybrid software-hardware system for accelerating read-dominated workloads on ordered key-value stores that provides linearizability for all operations including scans. Honeycomb stores a B-Tree in host memory. It executes <small>put</small> , <small>update</small> and <small>delete</small> on a CPU. At the same time, it offloads <small>scan</small> and <small>get</small> onto an FPGA-based SmartNIC. This approach enables large stores and simplifies the FPGA implementation but raises the challenge of data access and synchronization across the slow PCIe bus. We describe how Honeycomb overcomes this challenge with careful data structure design, caching, request parallelism with out-of-order execution, wait-free read operations, and fast synchronization between the CPU and the FPGA. For read-heavy YCSB workloads, Honeycomb increases the throughput of a state-of-the-art ordered key-value store by at least <inline-formula><tex-math notation="LaTeX">$1.8\times$</tex-math></inline-formula> . For scan-heavy workloads inspired by cloud storage, Honeycomb increases the throughput by more than <inline-formula><tex-math notation="LaTeX">$2\times$</tex-math></inline-formula> . The cost-performance, which is more important for large-scale deployments, is improved by at least <inline-formula><tex-math notation="LaTeX">$1.5\times$</tex-math></inline-formula> on these workloads.