AND Flash Array Based on Charge Trap Flash for Implementation of Convolutional Neural Networks
Hyun-Seok Choi, Hyungjin Kim, Jong‐Ho Lee, Byung‐Gook Park, Yoon Kim
Abstract
Various memory devices have been proposed for implementing synapse devices in neuromorphic systems. In this letter, an AND flash array based on charge trap flash (CTF) memory was proposed. CTF-based synapse devices are particularly suitable for off-chip learning applications because they have excellent reliability and stable multi-level operation characteristics. In addition, we proposed a method to implement convolutional neural networks in the proposed array, and performed system-level simulation using the characteristics of the fabricated device. Finally, we investigated the accuracy degradation of the neuromorphic system related to data retention and proposed a multiple cell mapping scheme to address this degradation issue.