Toward Reliable Compact Modeling of Multilevel 1T-1R RRAM Devices for Neuromorphic Systems
Emilio Pérez-Bosch Quesada, Rocío Romero‐Zaliz, Eduardo Pérez, Mamathamba Kalishettyhalli Mahadevaiah, John Reuben, Markus Andreas Schubert, F. Jiménez-Molinos, J.B. Roldán, Christian Wenger
Abstract
In this work, three different RRAM compact models implemented in Verilog-A are analyzed and evaluated in order to reproduce the multilevel approach based on the switching capability of experimental devices. These models are integrated in 1T-1R cells to control their analog behavior by means of the compliance current imposed by the NMOS select transistor. Four different resistance levels are simulated and assessed with experimental verification to account for their multilevel capability. Further, an Artificial Neural Network study is carried out to evaluate in a real scenario the viability of the multilevel approach under study.