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3-Layer Stacking Technology with Pixel-Wise Interconnections for Image Sensors Using Hybrid Bonding of Silicon-on-Insulator Wafers Mediated by Thin Si Layers

Masahide Goto, Yuki Honda, Masakazu Nanba, Yoshinori Iguchi, Eiji Higurashi, Takuya Saraya, Masaharu Kobayashi, Hiroshi Toshiyoshi, Toshiro Hiramoto

20222022 IEEE 72nd Electronic Components and Technology Conference (ECTC)11 citationsDOI

Abstract

We report a 3-layer stacking technology with pixel-wise interconnections suitable for image sensors. Au/SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> hybrid bonding of silicon-on-insulator wafers allows face-to-back as well as face-to-face bonding for multilayer stacking with pixel-wise interconnections. Thin Si layer is introduced as a bonding medium to enhance bonding strength. We have developed 3-layer stacked wafers without delamination thanks to adhesive thin Si layers with 3-layered pixel-parallel image sensors aligned at accuracy of 1 μm or better.

Topics & Concepts

StackingWaferPixelMaterials scienceSiliconLayer (electronics)OptoelectronicsWafer bondingSilicon on insulatorInsulator (electricity)Delamination (geology)AdhesiveComputer scienceNanotechnologyArtificial intelligenceChemistryTectonicsBiologyOrganic chemistrySubductionPaleontology3D IC and TSV technologiesThin-Film Transistor TechnologiesNanowire Synthesis and Applications
3-Layer Stacking Technology with Pixel-Wise Interconnections for Image Sensors Using Hybrid Bonding of Silicon-on-Insulator Wafers Mediated by Thin Si Layers | Litcius