Indium Zinc Oxide Nanosheet Transistor With 2 nm Channel Thickness for Monolithic Three-Dimensional Integrated Circuit
Zhenhao Li, Tsung-Che Chiang, Yu‐Chen Chen, Hsin-Hua Lee, Yu-Ting Tsai, Po‐Tsun Liu
Abstract
We have successfully fabricated an amorphous indium zinc oxide (a-IZO) thin film transistor (TFT) with a 2 nm-thick nanosheet channel, which demonstrated an impressive mobility of 84 cm2/V-s. By shrinking the channel length and width, the a-IZO TFT exhibited a high drain current density of 1.6 mA/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V} _{D}$ </tex-math></inline-formula> = 1 V, a sharper subthreshold swing of 72 mV/dec, and better drain-induced barrier lowering (DIBL) of 94 mV/V. By integrating p-type low-temperature poly-Si (LTPS) TFT and n-type a-IZO TFT, we have designed a heterogeneous complementary inverter that can achieve a high voltage gain of 99 V/V, while consuming only a few picowatts of power at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V} _{\text {DD}}$ </tex-math></inline-formula> = 1.5 V. All thermal budgets used in this study are compatible with the back-end-of-line (BEOL) process, making it a suitable approach for fabricating monolithic three-dimensional integrated circuits (M3D-ICs).