A Survey on Pipelined FFT Hardware Architectures
Mario Garrido
Abstract
Abstract The field of pipelined FFT hardware architectures has been studied during the last 50 years. This paper is a survey that includes the main advances in the field related to architectures for complex input data and power-of-two FFT sizes. Furthermore, the paper is intended to be educational, so that the reader can learn how the architectures work. Finally, the paper divides the architectures into serial and parallel. This classification puts together those architectures that are conceived for a similar purpose and, therefore, are comparable.
Topics & Concepts
Fast Fourier transformComputer scienceField (mathematics)Computer hardwareComputer architecturePower (physics)ArchitectureParallel computingAlgorithmMathematicsVisual artsPhysicsQuantum mechanicsArtPure mathematicsDigital Filter Design and ImplementationNumerical Methods and AlgorithmsLow-power high-performance VLSI design