Codesign of quantum error-correcting codes and modular chiplets in the presence of defects
Sophia Fuhui Lin, Joshua Viszlai, Kaitlin N. Smith, Gokul Subramanian Ravi, Charles Yuan, Frederic T. Chong, Benjamin J. Brown
Abstract
Fabrication errors pose a significant challenge in scaling up solid-state quantum devices to the sizes required for fault-tolerant (FT) quantum applications. To mitigate the resource overhead caused by fabrication errors, we combine two approaches: (1) leveraging the flexibility of a modular architecture, (2) adapting the procedure of quantum error correction (QEC) to account for fabrication defects.
Topics & Concepts
Modular designFabricationComputer scienceFlexibility (engineering)Overhead (engineering)QuantumError detection and correctionFault toleranceScalingQuantum computerElectronic engineeringEmbedded systemDistributed computingAlgorithmEngineeringPhysicsMathematicsQuantum mechanicsOperating systemGeometryStatisticsPathologyAlternative medicineMedicineQuantum Computing Algorithms and ArchitectureQuantum Information and CryptographyAdvancements in Semiconductor Devices and Circuit Design