HZO Scaling and Fatigue Recovery in FeFET with Low Voltage Operation: Evidence of Transition from Interface Degradation to Ferroelectric Fatigue
Zuocheng Cai, Kasidit Toprasertpong, Mitsuru Takenaka, Shinichi Takagi
Abstract
Thickness scaling of FeFETs with Hf <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.5</inf> Zr <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.5</inf> O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> (HZO) from 11 down to $4.6\mathrm{~nm}$ is systematically studied in this work in terms of the memory characteristics and the memory window (MW) narrowing mechanism. The HZO thickness scaling leads to low-voltage operation, higher $I_{\text{on}}/I_{\text{off}}$ ratio, lower S.S., and better endurance. It is also found, for the first time, that with reducing cycling voltage the dominant narrowing mechanism changes from MOS interface degradation to ferroelectric fatigue, which can be recovered by a high-voltage pulse. Based on this finding, we propose and demonstrate a method to improve endurance by utilizing this recovery, which is more effective in thinner HZO FeFETs.