Reliability Assessment of Power Semiconductor Devices for a 13-Level Boost Inverter Topology
Marif Daula Siddique, Prasanth Sundararajan, Sanjib Kumar Panda
Abstract
Over the past few decades, research on multilevel inverters (MLIs) has been growing in the power electronics field. The MLI is preferred over the conventional two-level converters due to its improved performance. In recent years, different types of MLI architectures have been proposed, each employing a unique combination of power semiconductor devices to produce a multilevel output voltage waveform. The reliability of an MLI is a crucial performance indicator that must be taken into account at every stage from design to commercialization. MLI is vulnerable to a variety of failure modes and processes due to a large number of interdependent components. In this letter, a 13-level boost inverter topology has been analyzed and the test results are presented and discussed. The analysis has been carried out in terms of open-circuit fault, short-circuit fault, power loss, and thermal analysis. The results have been discussed and recommendations have been made for the better design of the inverter topology to improve reliability.