All Digital Low-Overhead SAR ADC Built-In Self-Test for Fault Detection and Diagnosis

Mona Ganji, Marampally Saikiran, Degang Chen

202214 citationsDOI

Abstract

This paper proposes a novel method for a structural test of the Successive Approximate Register (SAR) Analog to Digital Converter (ADC). The presented strategy has an ignorable area and power overhead and is implemented entirely digitally. We introduce simple digital checkers for the structural test of the sample and hold switch. Moreover, with no addition of extra circuitry and using the normal potential of the ADC we will perform a fast and localized fault detection for the heart of the ADC, capacitive DAC block. The BIST can be applicable as both post-production and in-field tests, capable of detecting zero-time defects and latent defects. The proposed BIST has zero to none area overhead, fast run time, 100% coverage, and is fully digital with no degradation of the normal operation and performance of the ADC.

Topics & Concepts

Overhead (engineering)Successive approximation ADCBuilt-in self-testComputer scienceBlock (permutation group theory)Fault coverageCapacitive sensingFault detection and isolationEmbedded systemElectronic engineeringFault (geology)Computer hardwareComparatorEngineeringVoltageElectrical engineeringArtificial intelligenceElectronic circuitMathematicsOperating systemActuatorSeismologyGeometryGeologyVLSI and Analog Circuit TestingIntegrated Circuits and Semiconductor Failure AnalysisAdvancements in Semiconductor Devices and Circuit Design