A 2.5 ppm/°C Voltage Reference Combining Traditional BGR and ZTC MOSFET High-Order Curvature Compensation
Xifeng Liu, Liang Shan, Wenju Liu, Ping Sun
Abstract
This brief presents a voltage reference with high-order curvature compensation based on the zero temperature coefficient (ZTC) of MOSFET. The proposed voltage reference uses a conventional current reference to generate a constant current as of the bias of ZTCMOS. A curvature compensation method based on the α power model is combined with the conventional curvature compensation method to obtain a low temperature coefficient. Test results of the proposed voltage reference fabricated with the CSMC 0.18 μm CMOS process demonstrate that the output voltage is 628 mV. The trimmed temperature coefficient achieves 2.5 ppm/°C. The line sensitivity is 0.03 %/V, the chip area is 0.024 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , power consumption is 77 μW. The simulated power supply rejection ratio (PSRR) reaches -91.4 dB at 100 MHz.