Litcius/Paper detail

Optimization of Design Space for Vertically Stacked Junctionless Nanosheet FET for Analog/RF Applications

Sresta Valasa, Shubham Tayal, Laxman Raju Thoutam

2022Silicon34 citationsDOI

Topics & Concepts

NanosheetTransconductanceMaterials scienceCutoff frequencyOptoelectronicsConductanceTransistorDrain-induced barrier loweringCapacitanceField-effect transistorNanochemistryIonNanotechnologyElectrical engineeringVoltagePhysicsCondensed matter physicsElectrodeQuantum mechanicsEngineeringAdvancements in Semiconductor Devices and Circuit DesignSemiconductor materials and devicesFerroelectric and Negative Capacitance Devices
Optimization of Design Space for Vertically Stacked Junctionless Nanosheet FET for Analog/RF Applications | Litcius