Benchmarking Silicon FinFET With the Carbon Nanotube and 2D-FETs for Advanced Node CMOS Logic Application
Uttam Kumar Das, Muhammad M. Hussain
Abstract
In this article, the performance of silicon FinFET is compared with carbon nanotube (CNT-FET) and 2-D field-effect transistors (2D-FETs) for the upcoming node CMOS logic application. Based on the experimental results, a 17-stage ring oscillator (RO) circuit is implemented using the compact models to analyze the stage-delay and energy-delay performances. A tightly positioned 20- and 10-nm channel-length-based CNT-FET enhances I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> and also increases the leakage currents significantly. Due to poor electrostatic control and increased gate leakage, the CNT-FET and 2D-FET provide lowered I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> and a limited ac performance. Thus, targeting an off-state current, the FinFET delivers more than three times higher drive current, as well as five times better energy-delay performances in comparison to the CNT-FET and 2D-FET. On the other hand, scaled organic FETs are yet far away to compare with FinFET technology. Hence, the silicon-based (3-D) FETs are leading in all the devices (2-D, 1-D, and 0-D) for scaling next-generation CMOS technology.