Common-Mode Voltage Reduction Method for Three-Level Inverter With Unbalanced Neutral-Point Voltage Conditions
Changwei Qin, Xiaoyan Li, Xiangyang Xing, Chenghui Zhang, Guangxian Zhang
Abstract
The three-level inverter has been widely researched and adopted in industry. This article further proposes a carrier-based modulation method to reduce the common-mode voltage (CMV) and obtain high-quality output currents for three-level inverter with unbalanced neutral-point voltage conditions. In this method, the zero-sequence voltage is calculated by three-phase modulation waves, three-phase output currents, and voltages across the dc-link capacitors. The limitations of the zero-sequence component are carefully considered in order not to generate the basic voltage vector with high CMV magnitudes. In addition, a deadbeat control scheme for controlling the dc-link voltages asymmetrically with the proposed pulsewidth modulation method is presented, and asymmetrical control of dc-link voltages can be realized with fast response. Compared with the conventional space vector modulation (SVM) and the virtual SVM methods, the proposed scheme can reduce the CMV by half. Simulated and experimental results validate the effectiveness of the proposed method.