A Compact Sub-μW CMOS ECG Amplifier With 57.5-MΩ Z<sub>in</sub>, 2.02 NEF, 8.16 PEF and 83.24-dB CMRR
Chutham Sawigun, Surachoke Thanapitak
Abstract
This paper presents a compact DDA-based fully-differential CMOS instrumentation amplifier dedicated for micro-power ECG monitoring. Only eight transistors are employed to realize a power-efficient current-sharing DDA. A <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RC</i> network (using MOS pseudo resistors and poly capacitors) forms feedback loops around the DDA creating an ac-only amplification. The proposed amplifier is dc-coupled via gate terminals of the p-channel input transistors. It thus achieves sufficiently high input impedance over the entire ECG frequency range. Fabricated in a 0.35-μm CMOS process, the proposed amplifier occupies 0.0712 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . It operates from a 2 V dc supply with 336 nA current consumption. Measurements show that the amplifier attains its input impedance of 57.5 MΩ at 150 Hz and achieves 1.54 μV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> input-referred noise over 0.1-300 Hz. Noise and power efficiency factors are 2.02 and 8.16, respectively. At 50 Hz, the mean CMRR of 83.24 dB is obtained from 11-chip measurement. Experiments performed on a human subject confirm the functionality of the proposed amplifier in a real measurement scenario.