Impact of Switching Variability of 65nm CMOS Integrated Hafnium Dioxide-based ReRAM Devices on Distinct Level Operations
Maximilian Liehr, Jubin Hazra, Karsten Beckmann, Sarah Rafiq, Nathaniel C. Cady
Abstract
Limitations related to the von Neumann bottleneck have resulted in novel circuits and architectures, including designs that utilize Resistive Random Access Memory (ReRAM) as nonvolatile memory (NVM) devices. ReRAM implemented with hafnium oxide (HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) is a strong candidate for such applications. The non-volatility of these devices and their amenability to compute in memory functionality makes them ideal for neuromorphic applications, deep learning, and mathematical accelerator circuits (e.g. Vector Matrix Multiplication - VMM). However, these devices suffer from stochastic switching variability that currently limits their usage and performance. To realize the full potential of these devices, reliability analysis is required. In this work, a reliability study was performed using previously developed a 65 nm CMOS/Memristor process on a 300 mm wafer platform. To address the influence of switching compliance current on the variability of Low Resistance State (LRS) and High Resistance State (HRS), a total of 23 different compliance current values were implemented. The effects of temperature on device performance was also measured.