Radiation-Tolerant Digitally Controlled Ring Oscillator in 65-nm CMOS
Stefan Biereigel, S. Kulis, Paul Leroux, P. Moreira, Jeffrey Prinzie
Abstract
This article presents a radiation-tolerant digitally controlled complementary metal–oxide–semiconductor (CMOS) ring oscillator design suitable for all-digital phase-locked loop (ADPLL) implementations. To address the challenges presented by harsh radiation environments, a wide tuning range oscillator architecture is presented with superior single-event effect (SEE) tolerance. The proposed oscillator circuit is characterized experimentally in a 65-nm technology and shown to achieve a significant reduction in SEE sensitivity up to a linear energy transfer (LET) of 63.5 MeVmg<inline-formula> <tex-math notation="LaTeX">$^{-1}$ </tex-math></inline-formula>cm<sup>2</sup>, remain free from harmonic oscillation errors under irradiation, and withstand a total radiation dose exceeding 1.5 Grad. At the design frequency of 1.28 GHz, the oscillator dissipates 7 mW of power while achieving a phase noise of −105 dBc/Hz at 1 MHz offset, corresponding to a figure of merit (FOM) of 159 dB.