Photonic synaptic transistors with new electron trapping layer for high performance and ultra-low power consumption
Taewoo Kim, Kwang‐Seok Yun
Abstract
Photonic synaptic transistors are being investigated for their potential applications in neuromorphic computing and artificial vision systems. Recently, a method for establishing a synaptic effect by preventing the recombination of electron-hole pairs by forming an energy barrier with a double-layer consisting of a channel and a light absorption layer has shown effective results. We report a triple-layer device created by coating a novel electron-trapping layer between the light-absorption layer and the gate-insulating layer. Compared to the conventional double-layer photonic synaptic structure, our triple-layer device significantly reduces the recombination rate, resulting in improved performance in terms of the output photocurrent and memory characteristics. Furthermore, our photonic synaptic transistor possesses excellent synaptic properties, such as paired-pulse facilitation (PPF), short-term potentiation (STP), and long-term potentiation (LTP), and demonstrates a good response to a low operating voltage of - 0.1 mV. The low power consumption experiment shows a very low energy consumption of 0.01375 fJ per spike. These findings suggest a way to improve the performance of future neuromorphic devices and artificial vision systems.