Path-Independent Insertion Loss 8 × 8 Silicon Photonics Switch With Nanosecond-Order Switching Time
Ryotaro Konoike, Keijiro Suzuki, Kazuhiro Ikeda
Abstract
Silicon photonic switches with integrated p-i-n junctions can exhibit fast switching on the order of nanoseconds, enabling prospective optical networks with very fast reconfiguration times. However, carriers injected through the p-i-n junction cause extra loss, which can increase insertion loss, degrade uniformity and cause crosstalk. In this paper, we show that a path-independent insertion loss (PILOSS) switch with integrated p-i-n junctions can achieve uniform and very low on-chip insertion loss (3.8 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\pm$</tex-math></inline-formula> 0.19 dB) with strictly non-blocking characteristics. The switching time of our switch is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$< $</tex-math></inline-formula> 12.5 ns and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$< $</tex-math></inline-formula> 6.1 ns for 10%–90% and 10%–80% rise/fall times, respectively, and the optical crosstalk can be suppressed by more than 20 dB for a bandwidth of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$>$</tex-math></inline-formula> 31 nm for the worst case.