Net Separation-Oriented Printed Circuit Board Placement via Margin Maximization

Chung‐Kuan Cheng, Chia-Tung Ho, Chester Holtz

20222022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)16 citationsDOI Open Access PDF

Abstract

Packaging has become a crucial process due to the paradigm shift of More than Moore. Addressing manufacturing and yield issues is a significant challenge for modern layout algorithms. We propose to use printed circuit board (PCB) placement as a benchmark for the packaging problem. A maximum-margin formulation is devised to improve the separation between nets. Our framework includes seed layout proposals, a coordinate descent-based procedure to optimize routability, and a mixed-integer linear programming method to legalize the layout. We perform an extensive study with 14 PCB designs and an open-source router. We show that the placements produced by NS-place improve routed wirelength by up to 25%, reduce the number of vias by up to 50%, and reduce the number of DRVs by 79% compared to manual and wirelength-minimal placements.

Topics & Concepts

Margin (machine learning)Printed circuit boardBenchmark (surveying)Integer programmingMaximizationComputer scienceProcess (computing)Linear programmingRouterIntegrated circuit layoutComputer engineeringMathematical optimizationAlgorithmIntegrated circuitMathematicsGeographyMachine learningGeodesyComputer networkOperating systemVLSI and FPGA Design TechniquesOptimization and Packing ProblemsVLSI and Analog Circuit Testing