Wafer‐Scale Demonstration of MBC‐FET and C‐FET Arrays Based on Two‐Dimensional Semiconductors
Yin Xia, Lingyi Zong, Yu Pan, Xinyu Chen, Lihui Zhou, Yiwen Song, Ling Tong, Xiaojiao Guo, Jingyi Ma, Saifei Gou, Zihan Xu, Sheng Dai, David Wei Zhang, Peng Zhou, Yu Ye, Wenzhong Bao
Abstract
Abstract Two‐dimentional semiconductors have shown potential applications in multi‐bridge channel field‐effect transistors (MBC‐FETs) and complementary field‐effect transistors (C‐FETs) due to their atomic thickness, stackability, and excellent electrical properties. However, the exploration of MBC‐FET and C‐FET based on large‐scale 2D semiconductors is still lacking. Here, based on a reliable vertical stacking of wafer‐scale 2D semiconductors, large‐scale MBC‐FETs and C‐FETs using n‐type MoS 2 and p‐type MoTe 2 are successfully fabricated. The drive current of an MBC‐FET with two layers of MoS 2 channel (20 µm/10 µm) is up to 60 µA under 1 V bias. Compared with the single‐gate MoS 2 FET, the carrier mobility of MBC‐FET is 2.3 times higher and the sub‐threshold swing is 70% smaller. Furthermore, NAND and NOR logic circuits are also constructed based on two vertically stacked MoS 2 channels. Then, C‐FET arrays are fabricated by 3D integrating n‐type MoS 2 FET and p‐type MoTe 2 FET, which exhibit a voltage gain of 7 V/V when V DD = 4 V. In addition, this C‐FET device can directly convert light signals to an electrical digital signal within a single device. The demonstration of MBC‐FET and C‐FET based on large‐scale 2D semiconductors will promote the application of 2D semiconductors in next‐generation circuits.