Understanding Hot Carrier Reliability in FinFET Technology from Trap-based Approach
Runsheng Wang, Zixuan Sun, Yue‐Yang Liu, Zhuoqing Yu, Zirui Wang, Xiangwei Jiang, Ru Huang
Abstract
In this paper, the recent advances of our studies on hot carrier degradation (HCD) are presented from trap-based approach. The microscopic speculation of interface trap generation is carried out by time-dependent DFT (TDDFT) simulation in “real-time”. Two types of oxide traps contributing to HCD are identified from experiments. Combining the contributions of interface and oxide traps, a unified compact model has been proposed which can accurately predict hot carrier degradation and variation in full <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{V}_{\text{gs}}/\mathrm{V}_{\text{ds}}$</tex> bias. The trap locations, degradation contributions and temperature dependence are studied in detail. In addition, the mixed mode reliability of HCD-BTI coupling through self-heating and under off-state stress are discussed.