A Low-SWaP 16-Beam 2.4 GHz Digital Phased Array Receiver Using DFT Approximation
Vítor A. Coutinho, Viduneth Ariyarathna, Diego F. G. Coelho, Sravan Pulipati, Renato J. Cintra, Arjuna Madanayake, Fábio M. Bayer, Vassil S. Dimitrov
Abstract
A low-complexity approximation for the 16-point DFT and its respective multiplierless fast algorithm is proposed. A receive mode multibeam phased-array experiment was realized at 2.4 GHz employing a 16-element IQ receiver array that uses the proposed approximate spatial DFT in real-time in order to achieve multibeam digital beamforming. The 16-beam digital receiver experiment uses a ROACH-2 based Xilinx Virtex-6 FPGA platform for both digital beam computation as well as to perform the multireceiver analog-to-digital conversion. Receive mode RF beams were measured and compared to the exact DFT (realized with fixed-point multipliers with 8-bit twiddle factors). The measured approximate DFT closely followed the measured beams resulting from the fixed-point conventional DFT implementation. The approximate DFT achieves RF beam performance (mainlobe gain, sidelobes) similar to the DFT at the cost of a small error which would be tolerable for the majority of multibeam phased-array receivers. The 16-point approximate DFT provides a hardware reduction of ~70% with respect to FFTs, setting up a low size, weight and power (SWaP) system.The maximum magnitude error of the filter bank response is 0.106 (≈-20 dB).