Growth of high-quality semiconducting tellurium films for high-performance p-channel field-effect transistors with wafer-scale uniformity
Taikyu Kim, Cheol Hee Choi, Pilgyu Byeon, Miso Lee, Aeran Song, Kwun‐Bum Chung, Seungwu Han, Sung‐Yoon Chung, Kwon‐Shik Park, Jae Kyeong Jeong
Abstract
Abstract Achieving high-performance p-type semiconductors has been considered one of the most challenging tasks for three-dimensional vertically integrated nanoelectronics. Although many candidates have been presented to date, the facile and scalable realization of high-mobility p-channel field-effect transistors (FETs) is still elusive. Here, we report a high-performance p-channel tellurium (Te) FET fabricated through physical vapor deposition at room temperature. A growth route involving Te deposition by sputtering, oxidation and subsequent reduction to an elemental Te film through alumina encapsulation allows the resulting p-channel FET to exhibit a high field-effect mobility of 30.9 cm 2 V −1 s −1 and an I ON/OFF ratio of 5.8 × 10 5 with 4-inch wafer-scale integrity on a SiO 2 /Si substrate. Complementary metal-oxide semiconductor (CMOS) inverters using In-Ga-Zn-O and 4-nm-thick Te channels show a remarkably high gain of ~75.2 and great noise margins at small supply voltage of 3 V. We believe that this low-cost and high-performance Te layer can pave the way for future CMOS technology enabling monolithic three-dimensional integration.