CFET Design Options, Challenges, and Opportunities for 3D Integration
Lars W. Liebmann, Jeffrey Smith, D. Chanemougame, Paul Gutwin
Abstract
Design details of standard cell architectures using complementary field effect transistors (CFET) are explored. The primary structural elements of CFET are reviewed and the layout impact of several 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nd</sup> -order technology constructs is analyzed. A manufacturability assessment and cost analysis of the resulting CFET technology-architecture definition is presented. Finally, the extendibility of CFET to 3.5-track cell height as well as higher-order 3D integration is explored.
Topics & Concepts
Design for manufacturabilityComputer scienceIntegrated circuit designOrder (exchange)Field (mathematics)Software engineeringSystems engineeringComputer architectureEngineeringEmbedded systemMathematicsElectrical engineeringPure mathematicsFinanceEconomics3D IC and TSV technologiesAdvancements in Semiconductor Devices and Circuit DesignSemiconductor materials and devices