Electrical Characterization and Analysis of 4H-SiC Lateral MOSFET (LMOS) for High-Voltage Power Integrated Circuits
Li Liu, Jue Wang, Zishi Wang, Miaoguang Bai, Junze Li, Zhengyun Zhu, Hongyi Xu, Na Ren, Qing Guo, Kuang Sheng
Abstract
This paper demonstrates a SiC lateral MOSFET (LMOS) with DOUBLE RESURFs (reduce surface field) technology to improve the device's breakdown voltage. The electrical characteristics and analysis of the fabricated SiC LMOS are carried out in terms of output, transfer and blocking characteristics, as well as the leakage current mechanisms. In particular, the effect of the length of the P-top RESURFs on device performance is studied. The experimental results indicate that the SiC LMOS with P-top RESURFs of length <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$7\ \mu\mathrm{m}$</tex> exhibits best comprehensively with the highest breakdown voltage of 970 V, the highest Baliga's figure of merit BFOM of 83.6MW/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , and low (gate) leakage current. Which is recommended in this work and also encourages its further application in the power integrated circuits (Power ICs).