A SHA-3 Co-Processor for IoT Applications

Igor L.R. Azevedo, Alexandre S. Nery, Alexandre da Costa Sena

202010 citationsDOI

Abstract

The Secure Hash Algorithm 3 (SHA-3) is the latest member of the secure hash family of algorithms (SHA) on top of which several technologies are built upon, such as in Blockchain, security applications and protocols, including TLS, SSL, PGP, SSH, IPsec, and S/MIME. Due to tighter processing and power efficiency constraints often present in embedded applications, hardware architectures such as FPGAs (Field-Programmable Gate Array) can be employed to enable the design and implementation of efficient hardware accelerators. Thus, this work implements a SHA-3 Co-Processor in FPGA suitable for IoT applications. Performance, Circuit-area and Energy consumption results show that the Co-Processor is about 65% faster than the ARM Cortex-A9 processor that is also equipped in the FPGA chip, as well as in many IoT embedded systems.

Topics & Concepts

Computer scienceField-programmable gate arrayEmbedded systemHash functionIPsecSecure Hash AlgorithmEfficient energy useNetwork processorComputer hardwareComputer architectureCryptographic hash functionSHA-2Operating systemComputer networkNetwork packetEngineeringThe InternetElectrical engineeringComputer securityIoT and Edge/Fog ComputingCryptographic Implementations and SecurityAdvanced Malware Detection Techniques