GaN Ring Oscillators Operational at 500 °C Based on a GaN-on-Si Platform
Mengyang Yuan, Qingyun Xie, Kai Fu, Toiyob Hossain, John Niroula, James A. Greer, Nadim Chowdhury, Yuji Zhao, Tomás Palacios
Abstract
A study of GaN for high temperature (HT, up to 500 °C) digital circuits was conducted. A HT-robust GaN-on-Si technology based on enhancement-mode p-GaN-gate AlGaN/GaN high electron mobility transistors (HEMTs) and depletion-mode AlGaN/GaN HEMTs was proposed and used to implement different digital circuit configurations, namely E/D-mode and E/E-mode (E: enhancement, D: depletion). The E/D-mode inverter was found to offer significantly better performance in terms of voltage swing, noise margin, and gain, across temperature and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\textit {DD}}$ </tex-math></inline-formula> scaling. As calculated from E/D-mode ring oscillators (ROs) with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${L}_{G}=2\,\,\mu \text{m}$ </tex-math></inline-formula> , a RO exhibited a propagation delay ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${t}_{p}$ </tex-math></inline-formula> ) of < 1.48 ns/stage at 500 °C. The best RO achieved <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${t}_{p} < 0.18$ </tex-math></inline-formula> ns/stage at 25 °C. To the best of the authors’ knowledge, the proposed technology sets a new boundary of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${t}_{p}$ </tex-math></inline-formula> vs. <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${L}_{G}$ </tex-math></inline-formula> in wide band gap digital logic, and is operational at the highest reported temperature (500 °C) of a GaN digital circuit. The results reflect the promising potential of the proposed technology for emerging HT applications at 500 °C and beyond.