Comparative Study of Performance of SiC SJ-MOSFETs Formed by Multi-epitaxial Growth and Trench-filling Epitaxial Growth
Mitsuru Sometani, Kunihide Oozono, Shiyang Ji, Tadao Morimoto, Tomohisa Kato, Kazutoshi Kojima, Shinsuke Harada
Abstract
Reducing the process cost is a key issue in the manufacture of SiC superjunction-metal–oxide–semiconductor field-effect transistors (SJ-MOSFETs). In this study, we compared static and dynamic characteristics of a 1.2 kV-Class SJ-MOSFET fabricated by the multi-epitaxial growth (ME) method and the trench-filling epitaxial growth (TFE) method, which is expected to have a lower process cost. Comparably low specific on-resistance and switching losses were observed for the SJ-MOSFETs fabricated by both methods. However, the non-degraded carrier lifetime of the TFE-SJ device causes a large bipolar degradation, as compared with that of ME-SJ device. These results indicate that TFE-SJ devices have identical static and dynamic characteristics to those of ME-SJ devices, but their process cost is lower. However, the challenge of eliminating bipolar degradation by carrier lifetime control remains.