Endurance > 10<sup>11</sup> Cycling of 3D GAA Nanosheet Ferroelectric FET with Stacked HfZrO<sub>2</sub> to Homogenize Corner Field Toward Mitigate Dead Zone for High-Density eNVM
C.-Y. Liao, K.-Y. Hsiang, Zaizhu Lou, Hsien‐Cheng Tseng, Cheng-Hung Lin, Z.-X. Li, Fan-Chun Hsieh, C.-C. Wang, F.-S. Chang, W.-C. Ray, Yang-Yan Tseng, S. T. Chang, T.-C. Chen, M. H. Lee
Abstract
After 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> high endurance cycles with memory window (MW) =0.9 V is achieved for the 3D gate-all-around (GAA) nanosheet (NS) ferroelectric field-effect transistor (FeFET) based on double-HZO; the aim is to homogenize the corner field and mitigate dead zones. The interlayer Al <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> or TiN in the double-HZO exhibits MW enhancement or low access voltage, respectively. The proposed MFMFS GAA-FeFET demonstrates a low V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P/E</inf> = ±3.5 V (±2.3 MV/cm), large MW = 1.3 V, >10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> robust endurance cycles, and stable storage with data retention of >2×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> s; therefore, physical dimension scaling of the embedded nonvolatile memory (eNVM) is feasible for future generations.