Ultra-power-efficient heterogeneous III–V/Si MOSCAP (de-)interleavers for DWDM optical links
Stanley Cheung, Géza Kurczveil, Yingtao Hu, Mingye Fu, Yuan Yuan, Di Liang, Raymond G. Beausoleil
Abstract
We discuss the design and demonstration of various III–V/Si asymmetric Mach–Zehnder interferometer (AMZI) and ring-assisted AMZI (de-)interleavers operating at O-band wavelengths with 65 GHz channel spacing. The wafer-bonded III–V/Si metal-oxide-semiconductor capacitor (MOSCAP) structure facilitates ultra-low-power phase tuning on a heterogeneous platform that allows for complete monolithic transceiver photonic integration. The second- and third-order MOSCAP AMZI (de-)interleavers exhibit cross-talk (XT) levels down to <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" display="inline" id="m1"> <mml:mrow> <mml:mo form="prefix">−</mml:mo> <mml:mn>22</mml:mn> </mml:mrow> </mml:math> dB and <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" display="inline" id="m2"> <mml:mrow> <mml:mo form="prefix">−</mml:mo> <mml:mn>32</mml:mn> <mml:mtext> </mml:mtext> <mml:mi>dB</mml:mi> </mml:mrow> </mml:math> with tuning powers of 83.0 nW and 53.0 nW, respectively. The one-, two-, and three-ring-assisted MOSCAP AMZI (de-)interleavers have XT levels down to <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" display="inline" id="m3"> <mml:mrow> <mml:mo form="prefix">−</mml:mo> <mml:mn>27</mml:mn> </mml:mrow> </mml:math> dB, <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" display="inline" id="m4"> <mml:mrow> <mml:mo form="prefix">−</mml:mo> <mml:mn>22</mml:mn> </mml:mrow> </mml:math> dB, and <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" display="inline" id="m5"> <mml:mrow> <mml:mo form="prefix">−</mml:mo> <mml:mn>20</mml:mn> <mml:mtext> </mml:mtext> <mml:mi>dB</mml:mi> </mml:mrow> </mml:math> for tuning powers of 10.0 nW, 7220.0 nW, and 33.6 nW, respectively. The leakage current density is measured to be in the range of <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" display="inline" id="m6"> <mml:mrow> <mml:mn>1.6</mml:mn> <mml:mi>–</mml:mi> <mml:mn>27</mml:mn> <mml:mtext> </mml:mtext> <mml:mi>μA</mml:mi> <mml:mo>/</mml:mo> <mml:msup> <mml:mrow> <mml:mi>cm</mml:mi> </mml:mrow> <mml:mrow> <mml:mn>2</mml:mn> </mml:mrow> </mml:msup> </mml:mrow> </mml:math> . To the best of our knowledge, we have demonstrated for the first time, athermal III–V/Si MOSCAP (de-)interleavers with the lowest XT and reconfiguration power consumption on a silicon platform.