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A 95.1% Efficiency Hybrid Hysteretic Reconfigurable 3-Level Buck Converter With Improved Load Transient Response

Jeong-Il Seo, Baek-Min Lim, Won-Jong Choi, Young-Seok Noh, Sang‐Gug Lee

2022IEEE Transactions on Power Electronics21 citationsDOI

Abstract

This article presents a hybrid hysteretic reconfigurable 3-level buck converter for improving load transient response. A reconfigurable 3-level mode operation is proposed to improve the load transient response without the voltage rating issue. The <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RC</i> feedback network of the hybrid hysteretic control can be adjusted for the optimized transient response. Furthermore, a hysteresis-based quasi-self-balancing scheme, keeping the voltage across the flying capacitor at half the input voltage, is proposed to guarantee stable operation of the proposed converter. Implemented in a 55 nm CMOS, the proposed converter achieves maximum efficiency of 95.1% at an input voltage of 4.2 V, an output voltage of 3.3 V, and a load current of 200 mA. For a load current step of 750 mA, the under/overshoot voltage and settling times are 62/60 mV and 2.48/2.32 <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">μ</i> s, respectively. Compared to the conventional 3-level mode operation, the proposed technique improves the under/overshoot voltage and settling time by 2.21/2.22 and 1.78/1.69 times, respectively.

Topics & Concepts

Overshoot (microwave communication)Settling timeTransient responseTransient (computer programming)VoltageControl theory (sociology)CapacitorBuck converterCMOSComputer scienceTopology (electrical circuits)Electronic engineeringStep responseElectrical engineeringEngineeringControl engineeringControl (management)Artificial intelligenceOperating systemAdvanced DC-DC ConvertersAnalog and Mixed-Signal Circuit DesignLow-power high-performance VLSI design
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