32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays
Alessio Santiccioli, Mario Mercandelli, Simone M. Dartizio, Francesco Tesolin, Saleh Karman, A. Bahgat Shehata, Luca Bertulessi, Francesco Buccoleri, Luca Avallone, Angelo Parisi, Dmytro Cherniak, Andrea L. Lacaita, Michael Peter Kennedy, Carlo Samori, Salvatore Levantino
Abstract
Achieving long-distance, high data-rate wireless connections at the 5G millimeter-wave (mm-wave) frequency bands requires ultra-low-jitter local oscillators (LOs) [1]-[3] and phased-arrays with very accurate beam-steering capability [4], [5]. In regard to jitter, digital bang-bang phase-locked loops (BBPLLs) have been recently shown as capable of satisfying the very stringent requirements, while at the same time occupying less area than their analog counterparts [3]. This makes them particularly well-suited to the so-called localized LO-generation approach, where a synthesizer is placed in each of the individual transceiver elements, to avoid routing of a global high-frequency signal across large ICs and to leverage the jitter suppression resulting from an equivalent over-the-air combination of the outputs [1]. To achieve accurate beam-steering with LO phase-shifting, highly linear mm-wave phase-shifters are then conventionally placed on each of the LO signals [4], [5], leading, unfortunately, to a substantial power, noise, and area overhead.