A C4.5 decision tree classifier based floorplanning algorithm for System-on-Chip design
J. Shanthi, D. Gracia Nirmala Rani, S. Rajaram
Topics & Concepts
FloorplanAlgorithmSimulated annealingIntegrated circuitBenchmark (surveying)ChipComputer scienceElectronic engineeringEngineeringEmbedded systemElectrical engineeringGeographyGeodesyVLSI and FPGA Design TechniquesLow-power high-performance VLSI designAdvancements in Photolithography Techniques