CTLE-Ising: A Continuous-Time Latch-Based Ising Machine Featuring One-Shot Fully Parallel Spin Updates and Equalization of Spin States
Jooyoung Bae, Wonsik Oh, Jahyun Koo, Chengshuo Yu, Bongjin Kim
Abstract
Recently, hardware accelerators based on the Ising model have gained ever-increasing interest by demonstrating their capabilities of solving complex decision and optimization problems that are intractable using classical computers [CPUs/graphics processing units (GPUs)]. The problems are translated into combinatorial optimization problems (COPs) and mapped to the Ising machine, comprised of artificial spins interacting and naturally finding their optimal states. Recent discrete-time Ising machines operating at room temperatures have demonstrated solving small-scale COPs while consuming orders of magnitude lower energy than prior quantum annealers; however, they have several limitations due to their discrete-time operations, bulky spins, and lack of compact random number generators. In this work, we propose a novel Ising machine with compact latch-based spin circuits operating in a continuous time. The proposed continuous-time Ising machine finds solutions to COPs with fully parallel spin operations (couplings between latches), significantly reducing computing latency and energy consumption. Besides, the latch-based spins randomize or superpose their initial spin states to find better solutions with the lower Ising Hamiltonian (i.e., a key performance indicator (KPI) of the Ising machine). A <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$A 0.656 0.680$ </tex-math></inline-formula> mm2 test chip with a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$A 40 36$ </tex-math></inline-formula> latch-based spin array is fabricated using a 65 nm CMOS process. The proposed continuous-time latch-based spin with equalization (CTLE)-Ising achieves <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1000\times $ </tex-math></inline-formula> speedup compared to the discrete-time Ising machine operating at 1 GHz when solving max-cut COPs while consuming 0.2–3 nJ using 0.75–1.05 V core supply voltage.