Highly-Scaled Self-Aligned GaN Complementary Technology on a GaN-on-Si Platform
Qingyun Xie, Mengyang Yuan, John Niroula, James A. Greer, Nitul S. Rajput, Nadim Chowdhury, Tomás Palacios
Abstract
This paper reports on the scaling of self-aligned GaN complementary technology on a GaN-on-Si platform to push its performance limits for circuit-level applications. The highly scaled self-aligned p-channel FinFET (fin width =20 nm) achieved $I_{D,max}$ of -300 mA/mm and R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf> of $27 \Omega \cdot$ mm, a record for metal organic chemical vapor deposition (MOCVD)-grown III-N p-FETs. A systematic study on impact of fin width scaling and recess depth in these transistors was conducted. A new self-aligned scaled n-channel p-GaN-gate FET process (n-FET), compatible with the p-FinFET, demonstrated enhancement-mode (E-mode) n-FETs $(L_{G}=200$ nm, $I_{D, max}=525$ mA/mm, $R_{ON}= 2.9 \Omega \cdot$ mm) on the same platform. The p-FETs and n-FETs feature competitive performance in their respective categories, and when taken together, offer a leading solution for GaN complementary technology on a GaN-on-Si platform.