First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip
Bing‐Yue Tsui, C. L. Hung, T.K. Tsai, Yu-Chia Tsui, T. W. Wang, Yu Xin Wen, Cheng‐Wei Shih, Jen Chun Wang, Li-Jung Lin, C. H. Wang, Kuan‐Yu Chu, Po‐Hsiang Chen
Abstract
In this work, we reported the integration of 10-V CMOS logic circuit, 20-V gate driver, and 600-V VDMOSFET on a 4H-SiC single chip for full SiC smart power ICs. This integration process features PMOSFET isolation (P-iso) from the high voltage substrate, local oxidation of SiC isolation between devices, dual gate oxide thickness, and P <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> poly-Si gate. It is demonstrated that the blocking capability of the P-iso structure can exceed 700 V and the switch of the VDMOSFET can be controlled by a 10-V signal through a 10-V to 20-V level shifter and a 20-V gate driver.