A Low Power Single Gate L-shaped TFET for High Frequency Application
Prabhat Singh, Dip Prakash Samajdar, Dharmendra Singh Yadav
Abstract
In this manuscript, we have optimize the single gate L-shaped Tunnel field effect transistor (SG-L-TFET) for low power application. In this regard, the simulated SG-L-TFET comprises high ON-current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ) with low OFF-current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ) and very low sub-threshold swing value (SS) than Conventional dual gate TFETs (DG-TFETs). The high I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> is achieved in the SG-L-TFET because of the increased cross-sectional area of band-to-band tunneling (BTBT) junction. In this device structure, BTBT tunneling junction is perpendicular to channel direction which one is differ from the conventional TFET tunneling barrier length (L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> ). It is more scaleble than other vertical-BTBT-based TFET designs and provides higher I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> than a conventional planar TFET with the same gate overdrive voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ov</sub> ) of 0.8 V. In this work, analysis has been carried out for the optimization of drain length (L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</sub> ), source length (L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</sub> ), dielectric material variation for gate oxide and lower band gap material for source region. Simulation results have confirmed the superiority of SGL-TFETs over the conventional TFETs. In addition, the outcome of device parameters variation on the device functioning has been investigated for the comprehensible validation of its optimization.