A 26-Gb/s 140-GHz OOK CMOS Transmitter and Receiver Chipset for High-Speed Proximity Wireless Communication
Qiuyu Peng, Haikun Jia, Ran Fang, Pingda Guan, Mingxing Deng, Jiamin Xue, Wei Deng, Xin Liang, Baoyong Chi
Abstract
This paper presents a high data rate 140-GHz on-off keying (OOK) CMOS transmitter and receiver chipset implemented in 28nm CMOS process for short-range wireless communications. The transmitter comprises a power amplifier (PA), modulator, CML-to-CMOS converter, and a fundamental voltage-controlled oscillator (VCO). The receiver consists of a low-noise amplifier (LNA), demodulator, and a single-ended to differential converting amplifier. Continuous-time linear equalizers (CTLE) are implemented on transmitter and receiver baseband to extend the baseband bandwidth. The proposed chipset is wire-bonded to an on-board Vivaldi antenna and a FR4 PCB carrier board to reduce the system cost. Despite the low-cost packaging, it demonstrates measured 26-Gb/s and 17-Gb/s error-free (BER<10- <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> ) wireless OOK links at 1 cm and 5 cm distance, respectively. The transmitter and receiver consume 99 mW and 63 mW power consumption, respectively.