Litcius/Paper detail

RMC_NoC: A Reliable On-Chip Network Architecture With Reconfigurable Multifunctional Channel

Dongyu Xu, Yiming Ouyang, Wu Zhou, Zhengfeng Huang, Huaguo Liang, Xiaoqing Wen

2023IEEE Transactions on Very Large Scale Integration (VLSI) Systems10 citationsDOI

Abstract

As chip fabrication has advanced to the nano level, the increased link density has heightened the risk of failures. The potential performance drawbacks resulting from these link failures have become a critical challenge in the design of reliable network-on-chip (NoC) systems. Fault-tolerant routing algorithms have proven to be effective strategies for handling this issue by diverting packets away from failed links to prevent congestion. However, these algorithms often result in excessive packet diversion, especially in the presence of a higher failure rate, which can significantly constrain the network’s behavior. This article introduces a novel NoC design with reconfigurable multifunctional channels (RMC_NoC). This design dynamically adapts the channel functions in response to network conditions to ensure that packets from failed links follow their original paths. In addition, it presents a channel buffer bubble flow control mechanism that can resolve congestion by redistributing congested traffic within the channel buffer. The evaluation results demonstrate that our approach ensures superior network communication even in the presence of permanent link failures, with minimal area overhead and power consumption. Moreover, our system exhibits lower latency and higher throughput compared to state-of-the-art fault-tolerant methods across various link failure rates. Notably, even at a severe failure rate of 30%, RMC_NoC exhibits only a 16.3% increase in latency compared to an ideal failure-free environment (Baseline) while still maintaining system communication capabilities to a considerable extent.

Topics & Concepts

Network on a chipComputer scienceNetwork packetLatency (audio)Computer networkEmbedded systemFault toleranceOverhead (engineering)Flow control (data)Low latency (capital markets)ThroughputSystem on a chipDistributed computingWirelessTelecommunicationsOperating systemInterconnection Networks and SystemsGraphene research and applicationsSupercapacitor Materials and Fabrication